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Release Notes for STM32F4xx CMSIS

Copyright 2016 STMicroelectronics

 

Contents

STM32F4xx CMSIS update History

STM32F4xx CMSIS update History

V1.8.1 / 27-January-2022

Main Changes

  • All source files: update disclaimer to add reference to the new license agreement.
  • stm32f4xx.h
    • Update to add "TIM8_CC_IRQn" definition for STM32F446xx devices.
    • Update to use BSSR Register instead of BSSRL/BSSRH.
    • Fix Wrong Bit definition: "DBGMCU_APB2_FZ" instead of "DBGMCU_APB1_FZ" for TIM1, TIM8, TIM9, TIM10 and TIM11.
    • Remove "BKPSRAM" bit definition for STM32F40_41xxx &  STM32F401xx devices.
  • system_stm32f4xx
    •   Fix WaitState (WS) value to be aligned with the reference manual for STM32F410xx & STM32F411xE devices.

V1.8.0 / 09-November-2016

Main Changes

  • Add support of STM32F413xx and STM32F423xx devices

  • Add startup files "startup_stm32f413_423xx.s" for EWARM, MDK-ARM, TrueSTUDIO and SW4STM32 toolchains: Add DFSDM2 and CAN3 interrupts handler entry in the vector table

  • stm32f4xx.h

    • Rename DFSDM_TypeDef by DFSDM_Filter_TypeDef
    • Correct SRAM2 and SRAM3 base addresses

V1.7.0 / 22-April-2016

Main Changes

  • Add support of STM32F412xG devices

  • Add startup files "startup_stm32f412xx.s" for EWARM, MDK-ARM, TrueSTUDIO and SW4STM32 toolchains: Add DFSDM interrupts handler entry in the vector table
  • Update to use CMSIS_Core V4.3_CM4 version

  • stm32f4xx.h

    • Correct some bits definition to be in line with naming used in the Reference Manual (RM0090)
      • DCMI_RISR_OVF_RIS changed to DCMI_RIS_OVR_RIS
      • DCMI_IER_OVF_IE changed to DCMI_IER_OVR_IE
      • DCMI_MISR_x changed to DCMI_MIS_x
      • DCMI_ICR_OVF_ISC changed to DCMI_ICR_OVR_ISC
      • SAI_xFRCR_FSPO changed to SAI_xFRCR_FSPOL
      • LTDC_GCR_DTEN changed to LTDC_GCR_DEN
      • ADC_CSR_DOVRx changed to ADC_CSR_OVRx
      • DMA2D_IFSR_x changed to DMA2D_IFCR_x
      • DMA2D_IFSR_CCAEIF changed to DMA2D_IFCR_CAECIF
      • WWDG_CR_Tx changed to WWDG_CR_T_x
      • WWDG_CFR_Wx changed to WWDG_CFR_W_x
      • WWDG_CFR_WDGTBx changed to WWDG_CFR_WDGTB_x
    • Add missing bit definitions in the following registers to be in line with Reference Manual (RM0090)
      •  DCMI_ESCR, DCMI_ESUR, DCMI_CWSTRT, DCMI_CWSIZE, DCMI_DR, FMC_BWTR1 and DAC_CR registers
    • Correct a wrong value of SAI_xCR2_CPL definition bit
    • Correct a wrong value of QUADSPI_CR_SSHIFT and QUADSPI_CR_FTHRES bits definition
    • Correct a wrong value of LPTIM_CR_SNGSTRT definition bit
  • system_stm32f4xx.c
    • Update SystemInit_ExtMemCtl() function implementation to allow the possibility of simultaneous use of DATA_IN_ExtSRAM and DATA_IN_ExtSDRAM

V1.6.1 / 21-October-2015

Main Changes

  • stm32f4xx.h

    • Update bits definition for DSI_WPCR and DSI_TCCR registers
    • Remove the CLKDIV and DATLAT bits definition in BWTRx register for FMC/FSMC
    • Add the BUSTURN bit definition in BWTRx registers for FMC
  • system_stm32f4xx.c
    • Update PLL_N defined value for STM32F40xxx/41xxx devices

V1.6.0 / 10-July-2015

Main Changes

  • Add support of STM32F410xx, STM32F469xx and STM32F479xx devices

  • Add startup files "startup_stm32f410xx.s" for EWARM, MDK-ARM, TrueSTUDIO toolchains: Add LPTIM and FMPI2C interrupts handler entry in the vector table
  • Add startup files "startup_stm32f469_479xx.s" for EWARM, MDK-ARM, TrueSTUDIO toolchains: Add DSI and QSPI interrupts handler entry in the vector table

V1.5.0 / 06-March-2015

Main Changes

  • Add support of STM32F446xx devices

  • Add startup files "startup_stm32f446xx.s" for EWARM, MDK-ARM, TrueSTUDIO toolchains: Add QPSI, SPDIFRX, FMPI2C and CEC interrupts handler entry in the vector table

V1.4.0 / 04-August-2014

Main Changes

  • Add support of STM32F411xExx devices

    • system_stm32F4xx.c updated to use HSI or HSE Bypass
    • new defines added in stm32f4xx.h
  • Add startup files "startup_stm32f411xe.s" for EWARM, MDK-ARM, TrueSTUDIO toolchains: Add SPI5 interrupt handler entry in the vector table

  • Update EWARM startup files to be compliant with EVARM V7: add NOROOT keyword in all IRQ section names

V1.3.0 / 08-November-2013

Main Changes

  • Add support of STM32F401xExx devices

  • Update startup files "startup_stm32f401xx.s" for EWARM, MDK-ARM, TrueSTUDIO and Ride toolchains: Add SPI4 interrupt handler entry in the vector table

V1.2.1 / 19-September-2013

Main Changes

  • system_stm32f4xx.c : Update FMC SDRAM configuration (RBURST mode activation)

  • Update startup files "startup_stm32f427_437xx.s" and "startup_stm32f429_439xx.s"  for TrueSTUDIO and Ride toolchains and maintain the old name of startup files for legacy purpose

V1.2.0 / 11-September-2013

Main Changes

  • Add support of STM32F429/439xx and STM32F401xCxx devices

  • Update definition of STM32F427/437xx devices : extension of the features to include system clock up to 180MHz, dual bank Flash, reduced STOP Mode current, SAI, PCROP, SDRAM and DMA2D
  • stm32f4xx.h
    • Add the following device defines :
      • "#define STM32F40_41xxx" for all STM32405/415/407/417xx devices
      • "#define STM32F427_437xx" for all STM32F427/437xx devices
      • "#define STM32F429_439xx" for all STM32F429/439xx devices
      • "#define STM32F401xx" for all STM32F401xx devices
    • Maintain the old device define for legacy purpose
    • Update IRQ handler enumeration structure to support all STM32F4xx Family devices.  
  • Add new startup files "startup_stm32f40_41xxx.s","startup_stm32f427_437xx.s", "startup_stm32f429_439xx.s" and "startup_stm32f401xx.s" for all toolchains and maintain the old name for startup files for legacy purpose
  • system_stm32f4xx.c
    • Update the system configuration to support all STM32F4xx Family devices.  

V1.1.0 / 11-January-2013

Main Changes

  • Official release for STM32F427x/437x devices.
  • stm32f4xx.h
    • Update product define: replace "#define STM32F4XX" by "#define STM32F40XX" for STM32F40x/41x devices
    •  Add new product define: "#define STM32F427X" for STM32F427x/437x devices.
  • Add new startup files "startup_stm32f427x.s" for all toolchains
  • rename startup files "startup_stm32f4xx.s" by "startup_stm32f40xx.s" for all toolchains
  • system_stm32f4xx.c
    • Prefetch Buffer enabled
    • Add reference to STM32F427x/437x devices and STM324x7I_EVAL board
    • SystemInit_ExtMemCtl() function
      • Add configuration of missing FSMC address and data lines
      • Change memory type to SRAM instead of PSRAM (PSRAM is available only on STM324xG-EVAL RevA) and update timing values

V1.0.2 / 05-March-2012

Main Changes

  • All source files: license disclaimer text update and add link to the License file on ST Internet.

V1.0.1 / 28-December-2011

Main Changes

  • All source files: update disclaimer to add reference to the new license agreement
  • stm32f4xx.h
    • Correct bit definition: RCC_AHB2RSTR_HSAHRST changed to RCC_AHB2RSTR_HASHRST

V1.0.0 / 30-September-2011

Main Changes

  • First official release for STM32F40x/41x devices
  • Add startup file for TASKING toolchain
  • system_stm32f4xx.c: driver's comments update

V1.0.0RC2 / 26-September-2011

Main Changes

  • Official version (V1.0.0) Release Candidate2 for STM32F40x/41x devices
  • stm32f4xx.h
    • Add define for Cortex-M4 revision __CM4_REV
    • Correct RCC_CFGR_PPRE2_DIV16 bit (in RCC_CFGR register) value to 0x0000E000
    • Correct some bits definition to be in line with naming used in the Reference Manual (RM0090)
      • GPIO_OTYPER_IDR_x changed to GPIO_IDR_IDR_x
      • GPIO_OTYPER_ODR_x changed to GPIO_ODR_ODR_x
      • SYSCFG_PMC_MII_RMII changed to SYSCFG_PMC_MII_RMII_SEL
      • RCC_APB2RSTR_SPI1 changed to RCC_APB2RSTR_SPI1RST
      • DBGMCU_APB1_FZ_DBG_IWDEG_STOP changed to DBGMCU_APB1_FZ_DBG_IWDG_STOP
      • PWR_CR_PMODE changed to PWR_CR_VOS
      • PWR_CSR_REGRDY changed to PWR_CSR_VOSRDY
      • Add new define RCC_AHB1ENR_CCMDATARAMEN
      • Add new defines SRAM2_BASE, CCMDATARAM_BASE and BKPSRAM_BASE
    • GPIO_TypeDef structure: in the comment change AFR[2] address mapping to 0x20-0x24 instead of 0x24-0x28
  • system_stm32f4xx.c
    • SystemInit(): add code to enable the FPU
    • SetSysClock(): change PWR_CR_PMODE by PWR_CR_VOS
    • SystemInit_ExtMemCtl(): remove commented values
  • startup (for all compilers)
    • Delete code used to enable the FPU (moved to system_stm32f4xx.c file)
    • File’s header updated

V1.0.0RC1 / 25-August-2011

Main Changes

  • Official version (V1.0.0) Release Candidate1 for STM32F4xx devices

For complete documentation on STM32 Microcontrollers visit www.st.com/STM32